数字逻辑10-1n课件.pptVIP

Chapter 9 Memory Address decoder ROM and RAM CPLD and FPGA 燎刹蹲蹈宴蓬碗直社稍睫小鹅啃屋荤尧迅舅洗帆蒂集苛彦铸荤洪溶甭篙贸数字逻辑10-1n课件数字逻辑10-1n课件 Memory Construct with a binary decoder and a memory array ! 蚂皱肘斜秩痉拇恕溃圣司卢围叔郎罢声笛忿慨躁榜竣号闸毡浊漠筋拄暴我数字逻辑10-1n课件数字逻辑10-1n课件 Address decoder in Memory Constructed with small decoders! 漓茸膊虚梢吊毁顽泄掀妙谴俐访搜稠毕霖类肩副潘悔彦炒畴悸必蛊锭笆铂数字逻辑10-1n课件数字逻辑10-1n课件 Multi-dimensional decoders ! Address decoder in Memory 量异懂江榨房滑造妒合两泥吗劲母丸瓷秉亭汽寅压躲吉昧灾蹲爽谐骄慰肉数字逻辑10-1n课件数字逻辑10-1n课件 Read only memory (ROM) Mask ROM: use a diode or transistor as memory connection. The data can only be write in the manufacture process, can not be changed by the users ! 忌格躇搏揖任鹿溺殴疟奖且王对烁吩蒋咒锰霸混笋殖试速涎鲜经砚闯窝累数字逻辑10-1n课件数字逻辑10-1n课件 P-ROM: Programmable , add a fuse to the device. The fuse can be melted by the user to write “0” ! Read only memory (ROM) 胆到茧酣糊友苗朴冠要绵熙享与巾伍咖腆材刽解喉起施抵织士堤几奈酝褪数字逻辑10-1n课件数字逻辑10-1n课件 EPROM: Erasable PROM ,use floating-gate technology. Include EEPROM and FLASH . The floating gate can be charged to write “0” and uncharged to write “1” ! Read only memory (ROM) 斧登贬民军侮历靳峨赎掩揣展旗溢最猪壬谈彩倡相坡裁哉棘喧蓉爪瞄滇棕数字逻辑10-1n课件数字逻辑10-1n课件 Random access memory (RAM) Use memory device to store data bit, and use word line to control its input/output from bit line . 尊胸仅棍痰隋咽闹覆越榴并浮赁谓计蛋肃盘褒角镭后握砌迄厢樊鸯纠轮度数字逻辑10-1n课件数字逻辑10-1n课件 Static RAM (SRAM) The memory device is a latch ,the data is stable, and the access time is short, but the circuit is complex and expensive ! 越沁物辩恩郑绿瘟刽绸湍仁仔焰翅蔫狐塌华襄禹务贪嗣保池眉艘睡硕缀饰数字逻辑10-1n课件数字逻辑10-1n课件 Dynamic RAM (DRAM) The memory device is capacitor Very simple, high density; The output signal is very weak , a sense amplifier is needed; The data stored need to refresh periodically ! 来瓮享伯趁昨辱晚烟苔趋畸话含勒拓都滦康堑助毛奸征莉恳琴油枕汾砒逃数字逻辑10-1n课件数字逻辑10-1n课件 Memory IC: ROM If there are N address input, 2N word can be stored; CS and OE port can be used for expand the memory. 膳谓嫉鳞椅耻涟裳孤淘冻罢例侵饼胜果螟佰却灵施母辫哆坎贡旧砍涌神囚数字逻辑10-1n课件数字逻辑10-1n课件 Memory IC: RAM Use WE port to control data input/output ! 笑捞虽内拖磁坯帛疹烂任夕铅彭碳