具有成本效益记忆体架构的NAND快闪记忆体嵌入式系统设计.pdf

Cost-Efficient Memory Architecture Design of NAND Flash Memory Embedded Systems Chanik Park, Jaeyu Seo, Dongyoung Seo, Shinhan Kim and Bumsoo Kim Software Center, SAMSUNG Electronics, Co., Ltd. ci.park, pelican,dy76.seo, shinhank, bumsoo @ Abstract other memories. Fast SRAM or low power SRAM can be selected according to the trade-off between power NAND flash memory has become an indispensable consumption and performance with a high cost. In non- component in embedded systems because of its versatile volatile memories, NOR flash provides fast random access features such as non-volatility, solid-state reliability, low speed and low power consumption, but has high cost cos,t and high density. Even though NAND flash memory compared with NAND flash. Even though NAND flash gains popularity as data storage, it also can be exploited shows long random read latency, it has advantages in low as code memory for XIP execute-in-place . In this paper, power consumption, storage capacity, and fast erase/write we present a cost-efficient memory architecture which performance in contrast to NOR flash. incorporates NAND flash memory into an existing memory hierarchy for code execution. The usefulness of the Table 1. Characteristics of va