计算机专业英语（第二版）孙建忠电子教案 Chapter2.ppt

Computer English Chapter 2 Basic Organization of Computers Internally, the CPU has three sections, as shown in Figure 2-3. The register sections, as its name implies, includes a set of registers and a bus or other communication mechanism. The registers in a processors instruction set architecture are found in this section of the CPU. The system address and data buses interact with this section of the CPU. The register section also contains other registers that are not directly accessible by the programmer. The relatively simple CPU includes registers to latch the address being accessed in memory and a temporary storage register, as well as other registers that are not a part of its instruction set architecture. CPU内部有三大分区，如图2-3所示。寄存器区,顾名思义，它包括一组寄存器、一条总线或其他通信机制。微处理器指令集结构中的寄存器就属于CPU的这一分区。系统的地址和数据总线与寄存器交互。此分区还包括程序员不能直接访问的一些寄存器。相对简单CPU含有寄存器用以锁存正在访问的存储器地址，还有暂存器以及指令集结构中没有的其他寄存器等。 2.4 CPU Organization During the fetch portion of the instruction cycle, the processor first outputs the address of the instruction onto the address bus. The processor has a register called the program counter; the CPU keeps the address of the next instruction to be fetched in this register. Before the CPU outputs the address onto the systems address bus, it retrieves the address from the program counter register. At the end of the instruction fetch, the CPU reads the instruction code from the system data bus. It stores this value in an internal register, usually called the instruction register or something similar. 在指令周期的取指阶段，处理器首先将指令的地址输出到地址总线上。处理器有一个寄存器叫做程序计数器，CPU将下一条要取的指令的地址存放在程序计数器中。在CPU将地址输出到系统的地址总线之前，必须从程序计数器中取出该地址。在指令结束前，CPU从系统时局总线上读取指令码，它把该指令码存储在某个内部寄存器中，该寄存器通常称作指令寄存器或其他相似的名字。 2.4 CPU Organization The arithmetic logic unit or ALU performs most arithmetic and logical operations, such as adding or ADDing values. It receives its operands from the register section of the CPU and stores its results back in the register section. Since the ALU must complete its operations within a single