基于ARM%2bFPGA的三模导航接收机设计.pdfVIP

第五届中国卫星导航学术年会电子文集 Design of GNSS receiver based on ARM and FPGA 1 2 3 Jianzhong Qi , Beinan Zhang , Peng Song 1. College of Information Engineering. North China University of Technology, Beijing, China 2. College of Information Engineering. North China University of Technology, Beijing, China 3. College of Information Engineering. North China University of Technology, Beijing, China 1. qijianzhong2002@, 2. n.s.ralph@, 3. valee@126.com Abstract: With the continuous development of science technology, positioning and navigating by multiply satellite systems is playing an increasingly important role in both civil and military use. This article introduces a design scheme of navigation receiver system, based on the frame of ARM and FPGA, in hardware and software, and the fusion of three satellite systems is brought out by combing the frequency points of L1 in GPS, L1 in GLONASS and B1 in COMPASS. The RF front-end adopts MAX2769 chip from MAXIM Company, while FPGA and ARM adopt XC6SLX150 chip of Spartan-6 series from Xilinx Company and LPC3250 chip of ARM9 core from NXP Company. Three MAX2769 chips are dealing with down-converting and sampling satellite signals in these three frequency points. There is a Fast-Acquisition engine designed independently and Track engine consisting of three-order PLL aided by two-order FLL in FPGA, and thus FPGA can deal with acquisition and track of satellite signals. Resolving position and navigation scheme can be implemented in ARM, because of floating-point coprocessor inside, which enormously enhances t