005-0008-01D.pdfVIP

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005-0008-01D.pdf

EIA-232C Serial Interfacing with the Neuron® Chip January 1995 LONW ORKS® Engineering Bulletin Introduction The Neuron Chip is a programmable device that includes a rich variety of input/output capabilities. The Neuron Chips firmware can configure the 11 I/O pins of the processor in more than 30 different modes supported by software drivers. Application programs running on the processor can then access this I/O functionality through simple calls to the I/O driver functions. The Neuron Chip is also a device that can communicate with other Neuron Chips over a variety of networking media, such as twisted-pair wiring and power line, using the LonTalk® protocol. It is thus an ideal device to implement applications for control networks. . Neuron Network . Chip Trans- . ceiver Application I/O Networking Medium Figure 1. Architecture of a Neuron Chip-based node. ® A LONWORKS network uses a multi-drop concurrent-access architecture, so that multiple nodes can communicate in a peer-to-peer fashion. The RS-485 standard supports such a multi-drop architecture, allowing any node to communicate with any other node on the network, with up to 32 nodes per physical channel. On the other hand, the EIA-232C standard (formerly known as RS-232C) is a point-to-point architecture, which allows only two devices to communicate with each other. The standard was originally designed for communica

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