外文翻译--系统芯片.doc

英文资料： 1 Introduction The use of the system-on-chip ( SoC) technique allows for an unprecedented degree of miniaturization of rubidium atomic frequency standards. A compact direct digital frequency synthesizer (DDFS) plays an important role in our miniaturized rubidium atomic frequency standards for modulated 5.3125MHz sine wave generation. DDFSs are able to generate single-phase or quadrature sinusoids with excellent frequency resolution, good spectral purity, very fast frequency switching[1 ], and phase continuity on switching. Generally, a DDFS consist s of a phase accumulator, a phase to sine converter (sine ROM), and a DAC. At each clock pulse, the phase increment word in a frequency register is added to the phase value previously held in t he phase accumulator. The phase value is generated using the modulo 2j overflowing property of a j bit phase accumulator[2 ]. The output frequency is t he rate of t he overflows, where Δp is the phase increment word , j is the number of phase accumulator bits, fclk is the system clock frequency, and f out is t he output frequency. The previous constraint is required by the sampling theorem. The spectral purity of t he conventional DDFS is partly determined by the resolution of t he values stored in the ROM. It is desirable to increase the resolution of the ROM, but sometimes higher resolution means larger ROM size. However, the access speed and the maximum output frequency decrease as the ROM size increases. Larger ROM storage also means higher power consumption, lower reliability, and greatly increased costs. So it is significant to reduce the size of the ROM under the condition of meeting the high resolution requirement of the rubidium atomic frequency standard. The most elementary technique of compression is to store onlyπ/ 2rad of sine information ,and to generate the ROM samples for the full range of 2πby exploiting the quarter-wave symmetry of t he sine f unction[3 ] . The quarter-wave memory can be further compressed