DLTS(深能级瞬态谱).pptVIP

Pioneers in Measurements of Depth Formation of Depletion Layer (Step 1) Formation of Depletion Layer (Step 2) Depletion Layer + Bias Depletion Layer + Bias in Equilibrium Energy diagram in the depletion region Carrier Trapping Carrier Escape What do we measure? Instrument Control Loop LabVIEW Control Panel LabVIEW Diagram Data Analysis Panel Conclusions and Future Work * * Stress the importance of time The p side is highly doped The depletion layer extends after bias is applied The p side is highly doped The depletion layer extends after bias is applied Electrical forces cause the charges to move The p side is highly doped The depletion layer extends after bias is applied The p side is highly doped The depletion layer extends after bias is applied Keep holes and defect levels distinct Examples Stress how C depends on d Conductance/Valance Energy Leves, aka band edges Explain about the defect level and their localization Trapping process is very quick Low temp vs hot temp Thermal activation energy equals depth of trap Explain the basic algorythm of the program and the way the devices are connected together Don’t forget step 6 -- loop Emphasize that there is diff. In the bias pulse (square wave) and the data Intuitive language *picture taken from Serway, Raymond A., Beichner, Robert J. and Jewett, John W. Physics for Scientists and Engineers 5th Edition, Saunders College Publishing: Orlandon, FL, 2000 Motivation: Measuring the Depth of Defect –Related Traps in Semiconductors + + + + + + + + + + + + + + - + + + + + + + + + + + + + + + + - - - - - - - - - + + + + + + + + + + + + + + - + + + + + + + + + + + + + + + - - - - - - - - - Depletion Layer + + + + + + + + + + + + + + - + + + + + + + + + + + + + + + - - - - - - - - - Depletion Layer Bias Depletion Layer + + + + + + + + + + + + + + - + + + + + + + + + + + + + + + - - - - - - - - - Depletion Layer Bias Depletion Layer No bias With bias Energy Conductance Band Valence Band Defect Level Trap depth Energ