Analysis and Design of a LowStress BuckBoost Converter in UniversalInput PFC Application.pdf
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Analysis and Design of a LowStress BuckBoost Converter in UniversalInput PFC Application
320 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 21, NO. 2, MARCH 2006
Analysis and Design of a Low-Stress Buck-Boost
Converter in Universal-Input PFC Applications
´
Jingquan Chen, Member, IEEE, Dragan Maksimovic, Member, IEEE, and Robert W. Erickson, Fellow, IEEE
Abstract— In converters for power-factor-correction (PFC), the increased component stresses and component sizes compared
universal-input capability, i.e., the ability to operate from any to the boost converter [2]–[6].
ac line voltage world-wide, comes with a heavy penalty in terms In general, if their conversion characteristics meet the
of component stresses and losses, and with restrictions on the
dc output voltage. In this paper, we propose a new two-switch input/output specifications, the boost converter (for voltage
topology, boost-interleaved buck-boost (BoIBB) converter, which step-up) or the buck converter (for voltage step-down) feature
can offer significant performance improvements over single-switch the smallest component stresses. This is a result of the direct
buck-boost converters (including flyback, SEPIC, or Cuk topolo- energy transfer path from the input to the output in one of the
gies) or other two-switch buck-boost converters in universal-input switching subintervals in these two converter topologies. The
PFC applications. The paper presents an analysis of the converter
operation and component stresses, as well as design guidelines. boost and the buck converters require the minimum indirect
High efficiency (over 93%) throughout the universal-input ac line energy delivery and therefore have the mi
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