Case Study DefectOriented Testing of a Combinational Circuit.pdfVIP

Case Study : Defect-Oriented Testing of a Combinational Circuit Maksim Jenihhin Depa rtment of Compu ter Engineering, Tallinn University of Technology maksim@p ld.ttu.ee Abstract The pap er discuses an approach f or def ect-oriented testing of a combinational circuit fr om ISCAS ’85 benchmarks. To the contrary of widely used stuck-at f ault models def ect-oriented testing f ault models are more close to real lif e physical def ects that may occur during a digital circuit manufacturing. The case study p resented in this pap er considers wired-AND and wired-OR bridging f ault models of shorts, however the appr oach can be easily extended to more general methodology . The exp erimental results show high eff iciency of the p roposed method and p rovide Fig. 1. A defect shorting conductor lines causing statistical dataf orf urther analysis. a fault [2] 1. Introduction When a short occurs between two usually unconnected lines with the opposite driven logic values, depending on the circuit implementation Due to constant development of digital circuits technology, the resulting logic value on the shorted design techniques and especially the recent migration lines may become undetermined (for instance in case of to nanometer technology the manufacturing testing