《《ICT测试原理amp;AOIamp;AXI》.ppt

2004/8/22 * Analog TestResistive Test disconnect all connect s to “r1-1” connect i to “r1-2” resistor 1k, 6.52, 5.61, wb, re3, ar100m - + MOA DUT Reference Resistor = RREF Voltage Source = VS Voltage Output = IRDUT VMOA IREF Connection controls Test statement { Component type Expected value High and Low Options Tolerances S bus I bus 2004/8/22 * The TestJet Test Sensor Plate Electronics Board(amplifier) TestJet Pins PCB Support Probe Plates Top Plate 1. Ground all pins except one (and power pins). 2. Apply stimulus on the one pin. 3. Signal couples to Sensor Plate  as femto farad capacitance. 4. Electronics Board amplifies  signal. 5. Signal sent through Multiplex  card to ASRU for analysis. To MultiplexCard To Multiplex Card To BRC 2004/8/22 * The TestJet Gate Assembly Test Fixture Gate Assembly PCB 2004/8/22 * The Polarity Check Test Small TestJet or Polarity CheckProbe 2004/8/22 * The TestJet Verification verify testjet probes “device_name” verify all testjet probes verify testjet probes from “device_name” verify all mux cards verify mux mux# port port# module module# 2004/8/22 * The TestJet Test default threshold low 20 high 10000 device “u1” test pins 1 test pins 2, 3 test pins 4, 5, 6 ! test pins 7 ! Ground pins commented by IPG test pins 8 … test pins 13 ! test pins 14 ! Fixed pins commented by IPG device “u2” bottom; test pins 1 test pins 2 ... 2004/8/22 * The TestJet Test - Debug Graphic 2004/8/22 * The TestJet Test - After Debug default threshold low 20 high 10000 device “u1”; threshold low 15 high 10000 test pins 1 test pins 2, 3; threshold low 350 high 10000  test pins 4, 5, 6; threshold low 450 high 10000  ! test pins 7 ! Ground pins commented by IPG test pins 8 … ! test pins 13 !! Test measures 9  test pins 8  test pins 14 ! Fixed pins commented by IPG dev