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《《Wirelesstestflowamp;amp;itemintroduction》.ppt
Alpha Networks Inc. Wireless Test Flow Item Introduction Jane Jiang 2009/02/24 Test Developing Dept. Agenda Test Flow F1 Test Item Questions Test Flow Manufacturing F1 Test Program Flow Program EEPROM with Common Program EEPROM with common data, such as PCI configuration, common register setting, but without calibration data Program the several registers setting defined in the EEPROM, between 0xBF and 0xFF, that are hardware dependent and for each board design Output Power Calibration Output Power Calibration Output Power Calibration For 802.11a mode calibration, measurements are made over the frequency range of 5.150 MHz to 5.850 MHz in steps of 30 MHz. At each frequency, output power is measured for several PCDAC values covering the entire range from 1 to 63. 1. From this raw dataset, 10 most important frequency piers are automatically computed by the calibration routine. 2. The values pcdacMin and pcdacMax are computed at each frequency pier. 3. Output power is interpolated at the following percentage intercepts of pcdacMax and pcdacMin for each frequency pier: (0%, 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, and 100%). This data is then programmed into the EEPROM as the calibration data. 4. For the 802.11b and OFDM at 2.4 GHz modes of operation, a similar scheme is employed to store the calibration data, except that fixed pier locations of 2.412 GHz, 2.442 GHz, and 2.472 GHz are used. Output Power Calibration Target Power Control Test After calibration, measure power at the test frequencies at various rates and measure the output power to ensure if the Card/AP can accurately control the output power at the desired target power levels 802.11b Spectrum Mask Test 802.11b Spectrum Mask Test 802.11a/g Transmit Spectrum Mask 802.11a/g Transmit Spectrum Mask EVM (Error Vector Magnitude) Test 802.11a 64-QAM Constellation Link Test Tx packet error rate test Rx packet error rate test / Receive Sensitivity Test Frequency tolerance test / PPM t
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