Guided Region Prefetching A Cooperative HardwareSoftware.pdfVIP

Guided Region Prefetching: A Cooperative Hardware/Software Approach Zhenlin Wangy x x z y Doug Burger Kathryn S. McKinley Steven K. Reinhardt Charles C. Weems y Dept. of Computer Science x Dept. of Computer Sciences z Dept. of EECS Univ. of Massachusetts, Amherst The University of Texas at Austin University of Michigan Abstract latencies [28]. Hardware only schemes can prefetch spatial re- gions [10, 11, 22, 34, 38], pointer chains [14, 21, 35], or recur- Despite large caches, main-memory access latencies still cause significant ring patterns [26]. While these schemes can hide much of the main performance losses in many applications. Numerous hardwar e and soft- memory access time, they can also consume substantial amounts ware prefetching schemes have been proposed to tolerate these latencies. of memory bandwidth. This additional traffic need not degrade Software prefetching typically provides better prefetch accuracy than hard- uniprocessor performance, but it increases power consumption, and ware, but is limited by prefetch instruction overheads and the compiler’s will likely degrade performance on multiprocessors. Since off-chip limited ability to schedule prefetches sufficiently far in advance to cover bandwidth will be the dominant limiter of scalability for future chip level-two cache mis