U盘原理解析.doc

智能仪器作业 U盘原理 U盘的结构。 U盘的结构基本上由五部分组成：USB端口、主控芯片、FLASH（闪存）芯片、PCB底板、外壳封装。 其中USB端口负责连接电脑，是数据输入或输出的通道；主控芯片负责各部件的协调管理和下达各项动作指令，并使计算机将U盘识别为“可移动磁盘”，是U盘的“大脑”；FLASH芯片与电脑中内存条的原理基本相同，是保存数据的实体，其特点是断电后数据不会丢失，能长期保存；PCB底板是负责提供相应处理数据平台，且将各部件连接在一起。 1、USB端口： 常见的USB端口有以下几种： USB A型插引脚分布USB A型插引脚分布 USB B型插座引脚分布USB B型插头引脚分布 USB mini-B插座引脚分布 USB mini-B插引脚分布 U盘接口上一般都有四条线：电源线、地线、两根信号线。 主控芯片： 此款U盘我们采用安国出产的芯片：AU9380。对于此款芯片有几个特性要介绍一下：（以下摘自AU9380的技术手册第6页） “1、Support up to 4 NAND Flash memory chips with write-protected capability； 2、Runs at 12MHz, built-in 48 MHz PLL； 3、Built-in 3.3V regulator；” 这说明了几点：该款芯片能够自动提供稳压电源3.3V，支持多达4 个NAND 闪存芯片与写保护功能，另外外加晶振是12MHz。有了以上三个特性和以下的引脚功能就可以构造我们基本的电路。引脚功能如下： flash芯片： 这里采用K9F5608。这是一款32M8位数据宽度的存储芯片。关于该芯片的一些重要引脚功能如下（摘自K9F5608芯片手册第5页） “Command Latch Enable(CLE) The CLE input controls the activating path for commands sent to the command register. When active high, commands are latched into the command register through the I/O ports on the rising edge of the WE signal. Address Latch Enable(ALE) The ALE input controls the activating path for address to the internal address registers. Addresses are latched on the rising edge of WE with ALE high. Chip Enable(CE) The CE input is the device selection control. When CE goes high during a read operation the device is returned to standby mode. However, when the device is in the Busy state during program or erase, CE high is ignored, and does not return the device to standby mode. Write Enable(WE) The WE input controls writes to the I/O port. Commands, address and data are latched on the rising edge of the WE pulse. The WE must be held high when outputs are activated. Read Enable(RE) The RE input is the serial data-out control, and when active drives the data onto the I/O bus. Data is valid tREA after the falling edge of RE which also increments the internal column address counter by one. GND (Pin # 6) Connect this input pin to GND or set to st