OperatingSystem-Quiz1.docx

Q.1)The minimum information that must be saved before the processor transfers control to the interrupt handler routine is the ____________________A. program status word B. PSW (Correct Answer) C. location of the next instruction D. PSW and the program status word E. all of the above Q.2)The memory design dilemma (regarding cost vs. capacity vs. access time) is solved by employing a(n) __________________.Possible correct answers: : memory hierarchyQ.3)In cache memory design, ____________ size refers to the unit of data exchanged between cache and main memoryPossible correct answers: blockQ.4) Where is a fetched instruction normally loaded into?Possible correct answers: the Instruction Register IRQ.5) __________________ are general purpose in nature, but may be restricted to specific tasks such as performing floating-point operations.A. Operating systems B. Data registers (Correct Answer)C. memory management registers D. Central Processing Unit E. All of the above Q.6) Small, fast memory located between the processor and main memory is called:A. WORM memory B. CD-RW memory C. Cache memory (Correct Answer)D. None of the above Q.7) Information that must be saved prior to the processor transferring control to the interrupt handler routine includes: A. Processor Status Word (PSW) B. Processor Status Word (PSW) Contents of processor registers C. Processor Status Word (PSW) Location of next instruction (Correct Answer)D. None of the above Q.8) A drawback to the disable interrupt strategy of dealing with multiple interrupts is that it doesn’t account for __________________.Possible correct answers: prioritization or time-critical needsQ.9) To accommodate interrupts, a(n) ___________________ is added to the basic instruction cycle.Possible correct answers: interrupt cycleQ.10) Direct Memory Access (DMA) operations require the following information from the processor:A. Address of I/O device B. Number of words to be read or written C. Starting memory location to read from or