Dynamic Loop Caching Meets Preloaded Loop Caching – A Hybrid动态循环缓存和缓存–混合预紧环.pptVIP

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Dynamic Loop Caching Meets Preloaded Loop Caching – A Hybrid动态循环缓存和缓存–混合预紧环.ppt

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test test Dynamic Loop Caching Meets Preloaded Loop Caching – A Hybrid Approach Ann Gordon-Ross and Frank Vahid* Department of Computer Science and Engineering University of California, Riverside *Also with the Center for Embedded Computer Systems, UC Irvine This work was supported in part by the U.S. National Science Foundation and a U.S. Dept. of Education GAANN Fellowship International Conference on Computer Design, 2002 Introduction Memory access can consume 50% of an embedded microprocessor’s system power Instruction fetching usually more than half of that power Caches tend to be power hungry ARM920T: caches consume half of total power (Segars 01) M*CORE: unified cache consumes half of total power (Lee/Moyer/Arends 99) Filter Cache Tiny L0 cache (~64 instruct.) Kin/Gupta/Mangione-Smith97 Has very low dynamic power Short internal bitlines Close to microprocessor Power/energy savings, but: Performance penalty of 21% due to high miss rate (Kin’97) Tag comparisons consume power Dynamically Loaded Tagless Loop Cache Tiny cache that passively fills with loops as they execute (Lee/Moyer/Arends 99) Not really first level of memory Rather, an alternative Operation Filled when short backwards branch detected in instruction stream Compared to filter cache... No tags – even lower power Missless – no performance penalty Dynamically Loaded Tagless Loop Cache Tiny cache that passively fills with loops as they execute (Lee/Moyer/Arends 99) Not really first level of memory Rather, an alternative Operation Filled when short backwards branch detected in instruction stream Compared to filter cache... No tags – even lower power Missless – no performance penalty Dynamically Loaded Tagless Loop Cache Tiny cache that passively fills with loops as they execute (Lee/Moyer/Arends 99) Not really first level of memory Rather, an alternative Operation Filled when short backwards branch detected in instruction stream Compared to filter cache... No tags – even lower power Missless –