Dynamically Parameterized Architectures for Power Aware Video用于功率感知的视频的动态参数化结构.pptVIP

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Dynamically Parameterized Architectures for Power Aware Video用于功率感知的视频的动态参数化结构.ppt

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Using System-on-a-Chip as a Vehicle for VLSI Design Education Andrew Laffely and Wayne Burleson Electrical and Computer Engineering University of Massachusetts Amherst {alaffely,burleson}@ Challenges in VLSI Education Advancing Processing Technology Higher level design tools Realistic yet tractable design projects Preparation for jobs in semiconductor and other sectors. Making best use of faculty/student time and university resources ECE 559/659: VLSI Design Project (10 grads, 20 seniors) Learn design process for a complex VLSI in deep sub-micron CMOS Learn VLSI design skills and tools, including working in teams Learn about a particular application component and its VLSI implementation Learn to present formal design reviews using oral, written, graphical and web-based techniques Key Aspects of the Course aSoC (home-grown SoC platform) Provides a unifying framework to class Allows for subdivision but inter-relation of projects Interesting cutting edge architecture based on NSF- and SRC-funded research at UMASS and elsewhere Covers many aspects of VLSI Design Realistic constraints on area, timing, power and I/O Graduate and undergraduate teamwork Graduate students provide leadership, motivation and experience Commercial tools and design flow Review-based evaluation Oral and web-based reports for 4 different reviews: proposal, feasibility, implementation, integration Adaptive System-on-a-Chip (aSoC) Tiled architecture with mesh interconnect Point to point communication pipeline Allows for heterogeneous cores Differing sizes, clock rates, voltages Low-overhead core interface for On-chip bus substitute for streaming applications Based on static scheduling Fast and predictable Communication Interface Custom design to maximize speed and reduce power Core-ports Crossbar Controller Instruction memory Local frequency and voltage supply Class Projects SoC Infrastructure1,3 Communication Interface Interconnect3 Power Distribution Clock System Power Management Cor