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CSE477VLSI Digital CircuitsFall 2002Lecture 01: Introduction Mary Jane Irwin ( /~mji ) /~cg477 [Adapted from Rabaey’s Digital Integrated Circuits, ?2002, J. Rabaey et al.] Course Contents Introduction to digital integrated circuits CMOS devices and manufacturing technology. CMOS logic gates and their layout. Propagation delay, noise margins, and power dissipation. Combinational (e.g., arithmetic) and sequential circuit design. Memory design. Course goals Ability to design and implement CMOS digital circuits and optimize them with respect to different constraints: size (cost), speed, power dissipation, and reliability Course prerequisites EE 310. Electronic Circuit Design CSE 471. Logic Design of Digital Systems Course Administration Instructor: Mary Jane Irwin mji@ /~mji 227 Pond Lab Office Hrs: M 13:30-14:45 R 9:30-10:45 TA: Vijay Degalahal degalaha@ 225 Pond Lab Office Hrs: W R 17:30 to 19:30 in 101 Pond Labs: Accounts on 101 Pond Lab machines URL: /~cg477 Text: Digital Integrated Circuits, 2nd Edition Rabaey et. al., ?2002 (prerelease of the first nine chapters at the Penn State Bookstore) Lecture slides (pdf) – on the web Grading Information Grade determinates Midterm Exam ~25% Wednesday, October 16th , 20:15 to 22:15, 260 Willard Final Exam ~25% Monday, December 16th, 10:10 to noon, Location TBD Homeworks/Lab Assignments (5) ~20% Due at the beginning of class (or, if submitted electronically, by 17:00 on the due date). No late assignments will be accepted. Design Project (teams of ~2) ~25% In-class pop quizzes ~ 5% Please let me know about exam conflicts ASAP Grades will be posted on the course homepage Must submit email request for change of grade after discussions with the TA (Homeworks/Lab Assignments) or instructor (Exams) December 10th deadline for filing grade corrections; no requests for grade changes will be accepted after this date Background from CSE471 and EE31