姜书艳 数字逻辑设计及应用 14.pptVIP

* * Mux Internal Design s0 d i0 i1 2 × 1 i1 i0 s0 1 d 2 × 1 i1 i0 s0 0 d 2 × 1 i1 i0 s0 d 0 i0 (1*i0=i0) i0 (0+i0=i0) 1 0 2x1 mux 0 * * Mux Internal Design i0 4 × 1 i2 i1 i3 s1 s0 d s0 d i0 i1 i2 i3 s1 4x1 mux * EN_L C B A Y Y_L 1 X X X 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 0 1 D0 D0’ D1 D1’ D2 D2’ D3 D3’ D4 D4’ D5 D5’ D6 D6’ D7 D7’ (8输入1位多路复用器) Truth Table for a 74x151 A B C 8-Input,1-bit Multiplexer Digital Logic Design and Application (数字逻辑设计及应用) * 输入 G_L S 1 X 0 0 0 1 0 0 0 0 1A 2A 3A 4A 1B 2B 3B 4B (2输入4位多路复用器) Truth Table for a 74x157 输出 1Y 2Y 3Y 4Y 1A 2A 3A 4A 2-Input,4-bit Multiplexer Digital Logic Design and Application (数字逻辑设计及应用) * 1G_L 2G_L B A 1Y 2Y 1 1 X X 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 0 0 1C0 2C0 1C1 2C1 1C2 2C2 1C3 2C3 1C0 0 1C1 0 1C2 0 1C3 0 0 2C0 0 2C1 0 2C2 0 2C3 (4输入2位多路复用器74x153真值表) 双4选1 A B 1G 2G Truth Table for a 74x153 4-Input, 2-bit Multiplexer * Expanding Multiplexers(扩展多路复用器) Expanding Bit (扩展位) How to Realize 8-Input, 16-bit Multiplexer? (如何实现8输入，16位多路复用器？) From 8-Input, 1-bit to 8-Input, 16-bit (由8输入1位?8输入16位) Need 16 74x151, Each Chip Process 1-bit (需要16片74x151， 每片处理输入输出中的1位) Digital Logic Design and Application (数字逻辑设计及应用) * Expanding Multiplexers(扩展多路复用器) Expanding Bit (扩展位) Select-Inputs Connect to C,B,A of Each Chip (选择端连接到每片的C,B,A) Note: The Fanout Ability of Select field (注意：选择端的扇出能力) （驱动16个负载） EN Y Y A B C D0 D7 Digital Logic Design and Application (数字逻辑设计及应用) * Expanding Inputs (扩展数据输入端的数目) How to realize 3