以太网设备PCB布线参考.pdf

RTL8208 2002/1/29 Rev.1.1 1 REALTEK RTL8208 DESIGN AND LAYOUT GUIDE 1. Introduction This document provides detailed design and layout guidelines to achieve the best performance for implementing a 2-layer board design with the RTL8208 Octal PHY. The RTL8208 is the smallest Oct-PHY in the industry, having the smallest foot-print. To benefit BOM costs, one external PNP transistor is used to generate a 2.5V power source. Care needs to be taken, however, to prevent signals from cross-talk and interference due to the small package, and most importantly, to support a stable 2.5V power plane which determines the performance of data recovery and transmit jitter. RTL8208 8-port MAC TX_EN[7:0] TXD0[7:0] TXD1[7:0] CRS_DV[7:0] RXD0[7:0] RXD1[7:0] 50MHz oscillator REFCLK RTL8208 8-port MAC TX_EN[7:0] TXD0[7:0] TXD1[7:0] CRS_DV[7:0] RXD0[7:0] RXD1[7:0] REFCLK 25MHz X1 X2 X1 RMII Signal Diagram RMII Signal Diagram 50MHz Oscillator Solution 25MHz Crystal Solution RTL8208 2002/1/29 Rev.1.1 2 2. General Design and Layout Guide In order to achieve maximum performance with the RTL8208, good design attention is required throughout the design and layout process. The following recommendations will help implement a high performance system. 2.1 General Guidelines ? Create a good power source, minimizing noise from switching power supply circuits (50mV). ? Verify the quality of the components, such as clock source and transformer, to meet the application requirements. ? Keep power and ground noise levels below 50mV. ? Use bulk capacitors (4.7uF-10uF) between the power and ground planes. ? Use 0.1uF decoupling capacitors to reduce high-frequency noise on the power and ground planes. ? Keep decoupling capacitors as close as possible to the RTL8208. ? Provide termination on all high-speed switching signals. 2.2 Differential Signal Layout Guidelines ? Keep differential pairs as close as possible and route both traces as identically as possible, meaning