4_KAIST_Analysis_of_Return_Current_Path_for_Chip_Package_PCB.pdf

4_KAIST_Analysis_of_Return_Current_Path_for_Chip_Package_PCB.pdf

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4_KAIST_Analysis_of_Return_Current_Path_for_Chip_Package_PCB

Terahertz Interconnection and Package LaboratoryTERA Terahertz Interconnection and Package Laboratory Analysis of Return Current Path for Chip-Package-PCB Co-Design ??? (kamdong@) KAIST ???????? (http://tera.kaist.ac.kr) 2005. 10. 5 2/22Terahertz Interconnection and Package LaboratoryTERA Terahertz Interconnection and Package Laboratory What is Return Current? H r lowerSJ , r yEz x y SJHn rr =×? upperS jkzo lowerS jkzojkzo upperS Jze d VJ ze d Ve d VxyJ ,, , ? ?)?()?( ?=?= =×?= ? ?? η ηη + - Signal Current Return Current E-field Electromagnetic fields in parallel plates (TEM mode) Current interpretation (1D) of field propagation (3D) 1. For every signal current there must be an equal and opposite return current. 2. Subsequently, the return current is equally as important as the signal current for signal integrity and EMC analysis. 3. A very common mistake is to focus on providing a very clean and controlled signal trace with no thought whatsoever of how the current is going to return. upperSJ , r 3/22Terahertz Interconnection and Package LaboratoryTERA Terahertz Interconnection and Package Laboratory Return Current Flows along Least Impedance Path Return current flows through least impedance path. 1. Remember that any current injected into a system must return to the source. 2. It will do so through the path of least impedance, which in most cases means the path of least inductance. 3. Subsequently, the return current path is not fixed, but it varies with frequency. 4. Furthermore, in systems where there exist a multitude of return current paths, different amounts of the return current will flow along each path. 5. Any discontinuity in the return current path degrades the signal integrity. Bent line on top layer + solid plane on bottom layer 1kHz 10kHz 1MHz 4/22Terahertz Interconnection and Package LaboratoryTERA Terahertz Interconnection and Package Laboratory Power Distribution Network in Chip-PKG-PCB Hierarchy VCC GND On-chip Decoupling Ca

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