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74AUP1G57L6X,74AUP1G57FHX, 规格书,Datasheet 资料
October 2010
? 2008 Fairchild Semiconductor Corporation
74AUP1G57 ? Rev. 1.0.4
74A
U
P1G
57 —
TinyLogic
? Low
Pow
er U
niversal C
onfigurable Tw
o-Input Logic G
ate
74AUP1G57
TinyLogic? Low Power Universal Configurable Two-
Input Logic Gate
Features
0.8V to 3.6V VCC Supply Operation
3.6V Over-Voltage Tolerant I/Os at VCC
from 0.8V to 3.6V
High Speed tPD
- 2.9ns: Typical at 3.3V
Power-Off High-Impedance Inputs and Outputs
Low Static Power Consumption
- ICC=0.9μA Maximum
Low Dynamic Power Consumption
- CPD=2.9pF Typical at 3.3V
Ultra-Small MicroPak? Packages
Description
The 74AUP1G57 is a universal configurable 2-input
logic gate that provides a high performance and low
power solution ideal for battery-powered portable
applications. This product is designed for a wide low
voltage operating range (0.8V to 3.6V) and guarantees
very low static and dynamic power consumption across
the entire voltage range. All inputs are implemented
with hysteresis to allow for slower transition input
signals and better switching noise immunity.
The 74AUP1G57 provides for multiple functions as
determined by various configurations of the three
inputs. The potential logic functions provided are AND,
NAND, OR, NOR, and XNOR, inverter and buffer. Refer
to Figures 2 to 8.
Ordering Information
Part Number Top Mark Package Packing Method
74AUP1G57L6X AB 6-Lead Micropak?, 1.0mm Wide 5000 Units on Tape Reel
74AUP1G57FHX AB 6-Lead, MicroPak2?, 1x1mm Body, .35mm Pitch 5000 Units on Tape Reel
芯天下--/
? 2008 Fairchild Semiconductor Corporation
74AUP1G57 ? Rev. 1.0.4 2
74A
U
P1G
57 —
TinyLogic
? Low
Pow
er U
niversal C
onfigurable Tw
o-Input Logic G
ate
Pin Configurations
1B
2GND
3
6
5
4A
C
VCC
Y
Figure 1. MicroPak? (Top Through View)
Pin Definitions
Pin # Name Description
1 B Data Input
2 GND Ground
3 A Data Input
4 Y Output
5 VCC Supply Voltage
6 C Data Input
芯天下--/
? 2008 Fairchild Semiconductor Corporation
74
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