- 1、本文档共11页,可阅读全部内容。
- 2、有哪些信誉好的足球投注网站(book118)网站文档一经付费(服务费),不意味着购买了该文档的版权,仅供个人/单位学习、研究之用,不得用于商业用途,未经授权,严禁复制、发行、汇编、翻译或者网络传播等,侵权必究。
- 3、本站所有内容均由合作方或网友上传,本站不对文档的完整性、权威性及其观点立场正确性做任何保证或承诺!文档内容仅供研究参考,付费前请自行鉴别。如您付费,意味着您自己接受本站规则且自行承担风险,本站不退款、不进行额外附加服务;查看《如何避免下载的几个坑》。如果您已付费下载过本站文档,您可以点击 这里二次下载。
- 4、如文档侵犯商业秘密、侵犯著作权、侵犯人身权等,请点击“版权申诉”(推荐),也可以打举报电话:400-050-0827(电话支持时间:9:00-18:30)。
查看更多
CDCLVD1208RHDT;CDCLVD1208RHDR;中文规格书,Datasheet资料
FPGA
CDCLVD1208
LVDS Buffer
IN_SEL
PHY2
PHY2
PHY2
PHY2
PHY2
PHY2
PHY 7
125 MHz
125 MHz
Oscillator
CDCLVD1208
SCAS899 –AUGUST 2010
2:8 Low Additive Jitter LVDS Buffer
Check for Samples: CDCLVD1208
1FEATURES
DESCRIPTION? 2:8 Differential Buffer
? Low Additive Jitter: 300 fs RMS in The CDCLVD1208 clock buffer distributes one of two
selectable clock inputs (IN0, IN1) to 8 pairs of10 kHz to 20 MHz
differential LVDS clock outputs (OUT0, OUT7)
? Low Output Skew of 45 ps (Max)
with minimum skew for clock distribution. The
? Universal Inputs Accept LVDS, LVPECL,
CDCLVD1208 can accept two clock sources into an
LVCMOS input multiplexer. The inputs can either be LVDS,
LVPECL, or LVCMOS.? Selectable Clock Inputs through Control Pin
? 8 LVDS Outputs, ANSI EIA/TIA-644A Standard The CDCLVD1208 is specifically designed for driving
Compatible 50 Ω transmission lines. If the input is in single ended
mode, the appropriate bias voltage (V
AC_REF
) should? Clock Frequency up to 800 MHz
be applied to the unused negative input pin.
? 2.375–2.625V Device Power Supply
The IN_SEL pin selects the input which is routed to
? LVDS Reference Voltage, VAC_REF, Available for
the outputs. If this pin is left open it disables the
Capacitive Coupled Inputs
outputs (static). The part supports a fail safe function.
? Industrial Temperature Range –40°C to 85°C
It incorporates an input hysteresis, which prevents
random oscillation of the outputs in absence of an? Packaged in 5mm × 5mm 28-Pin QFN (RHD)
input signal
? ESD Protection Exceeds 3 kV HBM, 1 kV CDM
The device operates in 2.5 V supply environment and
APPLICATIONS is characterized from –40°C to 85°C (ambient
temperature). The CDCLVD1208 is packaged in? Telecommunications/Networking
small 28-pin, 5-mm × 5-mm QFN package.
? Medical Imaging
? Test and Measurement Equipment
? Wireless Communications
? General Purpose Clocking
Figure 1. Application Example
1
Please be aware that an important notice concerning availability, standard warranty, and use in
您可能关注的文档
- amazon美国海淘攻略.pdf
- AMI limits on 15 GHz excess emission in northern HII regions.pdf
- An Analysis of the Legal Issues Relating to the Prevention of Nuclear and Radiological Terr.pdf
- AMX5020系列模拟产品资料.pdf
- AMICCOM芯片使用环境搭建问题.doc
- An analog model of computation for the ill-posed problems of early vision.pdf
- An approach to chemical freeze-out scenario of identified particle spectra at 200AGeV Au-Au.pdf
- An approach to protein name extraction using heuristics and a dictionary.pdf
- An ecological model of the Northern and Central Adriatic Sea.pdf
- An Enhanced Static-List Scheduling Algorithm for Temporal Partitioning onto RPUs.pdf
文档评论(0)