Carriersrecombin_省略_cellbysimulation_宋云成.pdfVIP

Vol 17 No 7, July 2008 c? 2008 Chin. Phys. Soc. 1674-1056/2008/17(07)/2678-05 Chinese Physics B and IOP Publishing Ltd Carriers recombination processes in charge trapping memory cell by simulation Song Yun-Cheng(宋云成), Liu Xiao-Yan(刘晓彦)?, Du Gang(杜 刚) Kang Jin-Feng(康晋锋), and Han Ru-Qi(韩汝琦) Institute of Microelectronics, Peking University, Beijing 100871, China (Received 3 November 2007; revised manuscript received 16 February 2008) We have evaluated the effects of recombination processes in a charge storage layer, either between trapped electrons and trapped holes or between trapped carriers and free carriers, on charge trapping memory cell’s performances by numerical simulation. Recombination is an indispensable mechanism in charge trapping memory. It helps charge convert process between negative and positive charges in the charge storage layer during charge trapping memory programming/erasing operation. It can affect the speed of programming and erasing operations. Keywords: recombination in insulator, charge trapping memory, programming/erasing character- istic PACC: 7220J, 7220, 7960E, 7340R 1. Introduction With the progress of non-volatile semiconduc- tor memory, products featured of high density, high performance and low cost have been put to market. However, conventional non-volatile memory-floating gate flash memory encounters some barriers, either technological or physical.[1?4] The reliability issue is one of the most pressing problems preventing fur- ther scaling down of floating gate flash memory cell. As a promising candidate for the next generation of non-volatile semiconductor memory, charge trap- ping memory (CTM) is inherently immune form se- vere reliability issues accompanying good CMOS pro- cess compatibility.[5?8] Although an increasing inte- gration density of CTM has been achieved in sev- eral works recently,[9,10] commercial use still needs great efforts to optimize device performance. To avoid increasing fabrication cost and process complex-