第3章组合逻辑电路1是.ppt

串行进位并行加法器 全加器的个数等于加数的位数。优点是电路简单、连接方便；缺点是运算速度不高。最高位的运算，必须等到所有低位运算依次结束，送来进位信号之后才能进行。 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. 超前进位并行加法器 超前进位并行加法器采用超前进位（并行进位）的方法，能够先判断出各位的进位是0还是1，因此四个全加器可同时相加，从而提高了运算速度。 3-39为四位超前进位加法器74LS283的逻辑图。它由四个全加器和超前进位电路组成。每位全加器输出本位和Si、绝对进位Gi及产生相对进位用的Pi，Pi=Ai⊕Bi。 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. 每位全加器输出本位和Si 进位信号 令AiBi=Gi为绝对进位， PiCi为相对进位 则Ci+1=Gi+PiCi 四位进位信号的逻辑表达式： C1=A0B0+(A0⊕B0)C0 =G0+P0C0 C2=G1+P1C1 =G1+P1(G0+P0C0) =G1+P1G0+P1P0C0 C3=G2+P2C2 =G2+P2(G1+P1G0+P1P0C0) =G2+P2G1+P2P1G0+P2P1P0C0 C4=G3+P3C3=G3+P3(G2+P2G1 +P2P1G0+P2P1P0C0) =G3+P3G2+P3P2G1+P3P2P1G0+P3P2P1P0C0 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. FA FA FA FA ≥1 ≥1 ≥1 ≥1 C0 A0 B0 C0 S0 P0 G0 C1 B1 A1 C2 A2 B2 C3 A3 B3 S1 P1 G1 S2 P2 G2 S3 P3 G3 2 C4 3 C3 C2 C1 图3-39 四位超前进位并行加法器 =1 =1 1 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. 由这些表达式画出的超前进位电路实现了相对进位信号的快速传递。 各位和如下式： S0=A0⊕B0⊕C0 S1=A1⊕B1⊕C1 S2=A2⊕B2⊕C2 S3=A3⊕B3⊕C3 和数信号与进位信号是同时产生的，不必逐级传送。 因而，提高了运算速度。 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. A3 A2 A1 A0 C0 B3 B2 B1 B0 S3 S2 S1 S0 C4 74283 S1 B1 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 VCC B2 S3 CO A1 B0 CI GND A2 S2 A3 B3 A0 S0 A2 S2 B2 A3 B3 S3 C4 C0 B0 A0 A1 S0 B1 S1 74283的外引线排列图和逻辑符号 74LS283的逻辑符号及外引脚排列图 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. 例 解：按照加法的规则，低四位的进位输出CO应接高四位的进位输入CI，而低四位的进位输入应接0。逻辑图如图所示。 两片74283构成八位二进制加法器 A3 A2 A1 A0 CI B3 B2 B1 B0 S3 S2 S1 S0 CO 74283 A3 A2 A1 A0 CI B3 B2 B1 B0 S3 S2 S1 S0 CO 74283 0 试用两片74LS283构成八位二进制数加法器。 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client P