CypressPSoC4200系列ARMMCU评估方案课件.docx

Cypress PSoC 4200系列ARM MCU评估方案Cypress公司的PSoC 4200系列是基于ARM? Cortex?-M0 MCU的混合信号可编程系统控制器,拥有速度更快的处理器,更高的ADC采样速度以及基于PLD的增强型通用数字模块(UDB).器件包括有可编程和可重新配置的模拟和数字区块,其32位MCU子系统工作频率高达48MHz,32kB闪存和4kB SRAM,工作电压1.71V 到5.5V,多达36个可编GPIO,适应更广泛的应用开发需求.本文介绍了PSoC 4200系列主要特性,框图,以及FM4-U120-9B560 FM4 MCU评估板主要特性和电路图.PSoC? 4 is a scalable and reconfigurable platform architecture for a family of mixed-signal programmable embedded systemcontrollers with an ARM? Cortex?-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSoC 4200 product family, based on this platform, is a combination of a microcontroller with digital programmablelogic, high-performance analog-to-digital conversion, opamps with Comparator mode, and standard communication and timingperipherals. The PSoC 4200 products will be fully upward compatible with members of the PSoC 4 platform for new applications anddesign needs. The programmable analog and digital sub-systems allow flexibility and in-field tuning of the design.PSoC 4200系列主要特性:32-bit MCU Sub-system■ 48-MHz ARM Cortex-M0 CPU with single cycle multiply■ Up to 32 kB of flash with Read Accelerator■ Up to 4 kB of SRAMProgrammable Analog■ Twoopamps with reconfigurable high-drive external andhigh-bandwidth internal drive, Comparator modes, and ADCinput buffering capability■ 12-bit, 1-Msps SAR ADC with differential and single-endedmodes; Channel Sequencer with signal averaging■ Two current DACs (IDACs) for general-purpose or capacitivesensing applications on any pin■ Two low-power comparators that operate in Deep Sleep modeProgrammable Digital■ Four programmable logic blocks called universal digital blocks,(UDBs), each with 8 Macrocells and data path■ Cypress-provided peripheral component library, user-definedstate machines, and Verilog inputLow Power 1.71-V to 5.5-V Operation■ 20-nA Stop Mode with GPIO pin wakeup■ Hibernate and Deep Sleep modes allow wakeup-time versuspower trade-offsCapacitive Sensing■ Cypress Ca