基于synopsys的多功能时钟芯片的设计本科论文 .doc

基于Synopsys的多功能时钟芯片的设计 [摘要] 本次设计为了降低电子钟的成本，减少电子钟的面积和体积，集成更多的个性化功能，便在基于硬件描述语言VHDL或Verilog HDL为基础的EDA设计方法上，来设计新型的电子钟。设计中根据系统的功能要求合理划分出层次，进行分级设计和仿真验证，将较为复杂的数字系统逻辑简化为基本的模型从而降低实现的难度。以层次化的设计方法，自顶向下进行设计，最终把不同的功能模块组合到一起，这个过程使用Modelsim仿真软件和synopsys平台上的综合软件（Design Compiler）进行设计编译仿真，最终生成电路网表，通过网表电路绘制出电子钟芯片版图。实现了包含基本时分秒、年月日、日程提醒、农历显示、传统节假日提醒、闹铃闰年闰月提醒等多功能的电子钟。整个过程涉及了EDA设计的完整流程，可以很方便地通过修改增删，应用于各种相关系统中。 [关键字] 硬件描述语言VHDL、Synopsys、Modelsim、低功耗、版图绘制 The design of the multi-function clock chip based on Synopsys Abstract： This design in order to reduce the cost of electronic clock, reduce the area and volume electronic clock, integrated more personalized features, then based on the hardware description language VHDL or Verilog HDL based on EDA design method, to design a new type of electronic clock. Based on the function of the system in the design of reasonable divided into layers, for hierarchical design and simulation, to simplify the complex number system logic as a basic model to reduce the difficulty of implementation. With design method of hierarchical, top-down design, the different function modules together, finally the process using Modelsim simulation software and the design of the integrated software synopsys platform to compile the simulation, the resulting table the electric network, through the network table circuit map electronic clock chip layout. Implements contains basic split second, when (date) (month) (year), reminders, leap year lunar calendar display, traditional festivals remind, alarm leap month remind and other multi-function electronic clock. The process involves the complete process of EDA design, can be easily by changing the add or delete, applied to various kinds of related systems. Key words: VHDL hardware description language, Synopsys, Modelsim, low power consumption, map drawing  目录 引言 1 第一章: Synopsys简介 2 1、 Synopsys的简单工作原理 2 2、 Synopsys的应用 2 第二章：Design Compiler和 Modelsim简介 3