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2010级硕士模拟集成电路分析与设计期末复习题.doc

2010级硕士模拟集成电路分析与设计期末复习题.doc

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2010级硕士模拟集成电路分析与设计期末复习题

2010级研究生《模拟集成电路分析与设计》复习 一、Questions: 1.What is the problem of simple differential circuit? How to solve this problem? If Vin,CM is low, output will be clipped. (失真) 2.Describe advantages and drawbacks of differential signals comparing with single-ended signal. Advantages: a. Higher immunity to environmental noise b. Reject supply noise c. Reduce coupled noise in transmission line d. Other advantages (1).Increase output swing from VDD-(VGS-VTH) to 2[VDD-(VGS-VTH)] (2).Simpler biasing (3).Higher linearity Drawback: occupy twice area 3. Why analog design needed in Optical Receivers? High frequency signals are not suitable for transmitting over long distance in the traditional cable due to the severe interference and considerable attenuation because of the limited bandwidth of the cable. In this case, the electrical high frequency signals are converted into the optical signals first by the laser diode, then these optic signals are transmitted by an optical fiber, which has extremely wide band and very low loss. In the other end, the optical signals are converted into electrical signals again by the photodiode. Since the electrical current converted by a photodiode is very small, the receiver after the photodiode must process a low-level signal at a very high speed, which requires a low noise, broadband circuit design. 4. Which two figures play most important role in technology nodes scaling down? Please describe in detail. Minimum channel length Leff = 0.15 (m often represents the technology nodes; Oxide thickness tox = 5nm or 50 ? often affects the threshold voltage Vt (阈值电压)and thus the power supply. These two figures play most important role in technology nodes scaling down. 5. If there is a small mismatch between M1 and M2, how do the parameters of the transistors affect the common mode rejection ratio (CMRR) of a differential pair? Write the input pole of the circuit in Fig. 1. When both NMOS and PMOS devices are needed to be placed on one chip, what is n

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