eeprom(国外英文资料).doc

eeprom(国外英文资料) AVR singlechip and GCC programming memory operation The 2010-04-16 08:51 AVR series MCU inside there are three types of being independent addressing memory, they are: Flash program memory, internal SRAM data block storage and EEPROM data memory. Flash memory is 1K to 128K bytes, which supports parallel programming and serial downloads, which can usually be downloaded 10,000 times. Due to the AVR instruction is 16 or 32 bits, the program counter to addressing it according to the word, therefore the FLASH memory organization according to the word, but in the program visit FLASH storage area special instruction LPM can read the discretion of the specified address byte, respectively. The register heap (R0 ~ R31), I/O register, and SRAM are unified. So the operation of registers and I/O is used with the same instructions as accessing the internal SRAM. The organization structure is shown in figure 2-1. Figure 2-1, the AVR SRAM organization 32 common registers are addressed to the top, and the I/O register takes up the next 64 addresses. Start at 0X0060 for internal SRAM. The external SRAM is addressed to the internal SRAM. Within the AVR single chip, there are 64 ~ 4K EEPROM data memory, which are addressed independently by byte organization. The written life can be 100,000 times. 2.2 I/O register operations The I/O special register (SFR) is addressed to the same address space as the internal SRAM, which is similar to the operation of the SRAM variable. SFR definition file contains: # include IO. H file under the compiler include paths of avr directory, due to the avr between different devices register address of the same name have different problems, IO. H file does not directly define macros, SFR register it according to the command line options - mmcu and contain the appropriate ioxxxx. H file. In the ioxxx.h file that corresponds to the device, the pretreatment macros of the device SFR are defined, and the SFR is read and written directly to it in the