电子设计自动化中英文翻译.doc

电子设计自动化中英文翻译 毕业论文 附录B 翻译原文 Electronic design automation Keyword EDA; IC;VHDL language; FPGA PROCESS DESCRIPTION Three obstacles in particular bedevil ic designers in this dawn of the system on a chip. The first is actually a shortfall-the hardware and software components of the design lack a unifying language. Then, as the number of logic gates per chip passes the million marks, verification of a designs correctness is fast becoming more arduous than doing the design itself. And finally, not only gate counts but chip frequencies also are climbing, so that getting a design to meet its timing requirements without too many design iterations is a receding goal. As is the wont of the electronic design automation (EDA) community, these concerns are being attacked by start-up companies led by a few individuals with big ideas and a little seed money. PARLEZ-VOUS SUPERLOG? A system on a chip comprises both circuitry and the software that runs on it. Such a device may contain an embedded processor core running a software modem. Most often, after the chips functionality is spelled out, usually on paper, the hardware com- potent is handed off to the circuit designers and the software is given to the pro- grammars, to meet up again at some later date. The part of the chips functionality that will end up as logic gates and transistors is writ- ten in a hardware design language-Virology or VHDL, while the part that will end up as software is most often described in the programming language C or C++. The use of these disparate languages hampers the ability to describe, model, and debug the circuitry of the IC and the software in a coherent fashion. It is time, many in the industry believe, for a new design language that can cope with both hardware and software from the initial design specification right through to final verification. Just such a new language has been developed by Co-Design Automation Inc., San Jose, Calif. Before launching such an ambitious enterprise, c