拉扎维《模拟集成电路设计》第二版课件 Ch19.ppt

拉扎维《模拟集成电路设计》第二版课件 Ch19.ppt

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拉扎维《模拟集成电路设计》第二版课件 Ch19

* Example 19.8(1) The circuit routes its tail current to either of the outputs according to the large swings controlling the gates of M1 and M2. Explain what happens at node X. If the tail current of a large number of these pairs feed from node X, should voltage be provided externally? Solution: When M1 is off, In equilibrium, Voltage drop, the voltage is coupled to node X through gate and drain * Example 19.8(2) If the tail current of a large number of these pairs feed from node X, should voltage be provided externally? Solution: The disturbance may be quite significant, demanding that a decoupling capacitor be connected from X to ground. However, it may possibly degrade overall speed. Also, a large CX is placed off-chip may introduce inductance, too. In some cases, X would be just left agile. * Mutual Inductance Power noise also shows through mutual inductance of bond wires and package traces. The design of the pad frame and position plays a critical role. In parallel lines, mutual inductance also manifests itself. * Reduce Mutual Inductance Two methods can reduce the mutual coupling - First, the wires can be connected such that they are perpendicular to each other - Ground or supply lines can be interposed between critical bond wires Reduce inductance by carrying opposite current * Self- and Mutual Capacitance The capacitance seen from each trace of the package to ground may limit the input bandwidth of the circuit or load the preceding stage LC may yield a finite resonance frequency stimulated by various transient currents The high Q LC would give rise to a sharp resonance and amplify the noise considerably * * Fringe Capacitance The electric field lines terminate on the edge of other plate. Fringe capacitance must be taken into account * MOS Transistor Capacitor With source and drain tied together, one MOSFET is a simple capacitor Voltage dependence of the capacitance leads to non

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