平面工艺IGBT制作及导通压降的PIN模型计算.PDF

44 5 V o.l 44 N o. 5 2009 10 JOU RNAL OF SOUTHW EST JIAOTONG UN IVER SITY O ct. 2009 : 025 8-2724 2009) 05-0648-06 DOI: 10. 3969 / j. issn. 0258-2724. 2009. 05. 004 IGBT PIN 袁寿财, 刘亚媚 , 34 1000) : , IGBT , - , 3. 7 ~ 4. 8 V . IGBT P IN , . : ; , , 8% . : ; ; ; P IN ; : TM 205 : A Planar IGBT Fabrication and ForwardVoltageDrop Calculated by PINModel YUAN Shouca i, L I U Yam ei Schoo l of Phys ics and E lectronics Inform a tion, G annan N o rm al U niversity, G anzhou 34 1000, Ch ina) Abstract: IGBT insulate gate b ipo lar transistor) dev ices w ith planar processes w ere designed and fabricated based on planar silicon CMOS com p lmi entary m eta l ox ide sem iconductor ) techno logy equ ipm ents and ep itax ia l silicon substrates. T he m easured ou tput current-vo ltage characteristics o f the fabricated IGBT dev ices are excellent, and the ir thresho ld vo ltage is from 3. 7 to 4. 8 V. T he forw ard vo ltage drop s of the IGBT dev ices w ere ana lyzed and ca lculated by P IN diode a p-type near intrinsic and an n-type sem iconductor) mode l w ith the ir designed structure and process param eters, and the calculated forw ard voltage drop s w ere com pared w ith the m easured data. T he com parison resu lt show s that they are fitting better w hen conducted curren ts are sm all, but there ex ist differences bewt een the calculated and m easured forw ard vo ltage drops due to m odel smi