应用在汽车雷达之CMOS双频频率合成器-国家奈米元件实验室.PDF

1 02 CMOS A Dual-band Synthesizer for Automotive Radar Application CMOS 90 nm 3(Self-frequency-tripling) K-band W-band K-band 25.4-29.7 W-band 76.2-89.1GHz 12.9GHz 1.2V 62.4mW 26.11 GHz 1 MHz -92.2 dBc/Hz 78.34 GHZ 1 MHz -83.5 dBc/Hz Abstract In this study, a dual-band phase-locked loop (PLL) in 90 nm CMOS, capable of operating at both K- and W-bands, is presented. A self-frequency-tripling technique is proposed for the voltage-control oscillator (VCO) in the PLL, which allows generating the fundamental and third harmonic frequencies simultaneously and with a wide tuning range and reduced divider operating frequency. Using the proposed technique, the locked frequency range at K-band is 25.4–29.7 GHz, and an excellent tuning range at W-band up to 12.9 GHz (from 76.2–89.1 GHz) is achieved. Under a 1.2 V supply and power dissipation of 62.4 mW, the measured closed loop phase noise of the PLL at 1 MHz oset is -92.2 dBc/ Hz at 26.11 GHz and -83.5 dBc/Hz at 78.34 GHz, respectively. The proposed PLL capable of dual-band operation is suitable for the automotive radar applications with dierent standards. Keywords (K-band) 3(W-band) CMOS NANO COMMUNICATI