avr 单片机 时钟设计 文本文档(国外英文资料).docVIP

avr 单片机 时钟设计 文本文档(国外英文资料) Elective courses AVR SCM Embedded systems portal Design of electronic clock for homework questions Name of student Professional class No. Student number Hospital (Department) No. The circuit structure and working principle: AVRMega16 MCU and DS1302 clock chip, digital tube, numerical through the single-chip driver DS1302 chip and read the internal registers of the time, through the single-chip processing, finally through digital tube display. Atmega16 SCM structure The ATmega16 is a low power 8 bit CMOS microcontroller [1] based on enhanced AVR RISC architecture. Because of its advanced instruction set and single clock cycle instruction execution time, the data throughput rate of ATmega16 is as high as 1 MIPS/MHz, which can reduce the contradiction between power consumption and processing speed. The ATmega16 AVR kernel has a rich instruction set and 32 general-purpose working registers. All registers are directly connected to the arithmetic logic unit (ALU) so that one instruction can access two separate registers simultaneously in one clock cycle. This architecture greatly improves code efficiency and has a data throughput rate of up to 10 times higher than the average CISC microcontroller. ATmega16 has the following features: 16K bytes of in system programmable (Flash has the ability to read and write at the same time, namely RWW), 512 byte EEPROM and 1K byte SRAM, 32 common I/O port line, 32 general-purpose working registers, JTAG interface for boundary scan, supports on-chip debugging and programming, compared with three the flexible mode of timer / counter (T/C), internal / external interrupt chip, programmable serial USART, serial interface with initial condition detector, 8 Road 10 with selectable differential input stage programmable gain (TQFP package) ADC has an on-chip oscillator Programmable Watchdog Timer, a the SPI serial port, and the six can be selected by the software power saving mode. In idle mode the CPU to stop working,