fast_spice仿真器使用说明.ppt

Jaeha Kim, 10/17/2001 Fast SPICE Simulators: A Survey Outline How SPICE works Fast SPICE simulators in the market Nassda’s HSIM Avant!’s Star-SimXT and more More on HSIM SPICE Really, it’s just all about solving KCL and KVL equations: Generally, it’s a nonlinear differential equation (e.g. transistors). Bunch of numerical algebra First, Linearize it At each time step, SPICE builds a small-signal model (i.e. linear model) at the operating point: Matrix Equation Construct a matrix equation : Ax=b Then, Solve Ax=b Direct Method: x = A-1b. Iterative Method: xn+1 = f(xn); iterate until xn converges to the solution. Example: b = 1/a vs bn+1 = bn(2-a.bn). Ways to speed up Speed bottlenecks: Small circuits: linearizing Large circuits: solving equations Recent techniques for speed-up: Look-up table model Event-driven algorithm or multi-timestep algorithm: less computation for inactive subcircuits Hierarchical simulation: save memory and computation for redundant circuits. Parallel computation Cadence’s Spectre 3x faster than SPICE Can handle up to 50,000+ devices Uses the same basic algorithms as SPICE; just written more carefully with the latest algorithmic techniques. Behavioral description (Verilog-A) Cadence’s ATS Accelerated Transistor-Level Simulator 100-1,000x faster than SPICE within 5% error Partitions the circuits and uses different time-steps: exploits circuit latency and multi-rate behavior Celestry’s UltraSim 100-1,000x faster than SPICE within 1% error Hierarchical simulation: adaptive-hierarchy compaction technology ? crucial for DRAM simulation Faster ODE solver engine Synopsys’s NanoSim 10-1,000x faster than SPICE within 2-7% error. Used with TimeMill and PowerMill. Hierarchical Array Reduction(HAR) Analog Circuit Engine(ACE): partitioning and synchronization (parallel comp.). Verilog-A support Nassda’s HSIM Hierarchical Storage and Isomorphic Matching 1,000-10,000x faster than SPICE with user-selectable accuracy Hierarchical storage and simulation Is