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半导体CMP

CMP defect Surface particle Slurry residue CMP defect Macro-Scratch Micro-Scratch CMP defect Water spot Plug coring your partner in analog, connecting you with the digital world CMP Introduction Fab3 CMP Qi qiang Outline CMP background CMP process introduction CMP consumables CMP defect CMP background What is CMP? Chemical Mechanical Planarization (Smoothing and planing) Rotation Rotation View of CMP CMP background CMP history Engineer at IBM first used CMP to improve 4LM bipolar logic and CMOS devices yield and chip performance------------------------1985 Inter-layer Dielectrics(ILD or IMD) and Tungsten CMP appeared at geometries of sub 0.55um gate length ------------------------------1992 Shallow Trench Isolation CMP (STI) reduced distance of neighboring transistors for sub 0.18um --------------------------------------------1999 Cu CMP is key to BEOL Cu metallization enabling dense transistors packing for more than 8 levels of metal at sub 0.13um -----------2001 Now low-K oxide,DSTI CMP,special metal CMP application were for sub 90/65/45nm gate length productions------------------------ Now CMP background CMP vs Other Planarization Techniques R= the Relaxation Distance, = planarization angle CMP background Why use CMP? Step high increase,poor step coverage leaves photo resist unexposed and inaccurate pattern replication. DOF: Depth Of Focus CMP background Lithography pattern will not be accurately replicated Extreme topography means slower devices Uniform and Planar surface Higher Performance Improved Die Yields and Device Reliability Simplified lithography CMP process introduction CMP polishing machine CMP Application Post CMP clean CMP polishing machine EBARA:EPO222 structure CMP polishing machine Ebara Head for OX/W CMP Process Integration CMP Polisher Polish CMP Clean System Thin film Measurement Consumables Distribution System OxideMetal Slurries Post Clean ChemicalRoller Polishing Pad Diamond Condition Or Dr

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