CompactPCIPCI总线高速数字IO的设计-中国测试.PDF

31 6 Vol.31　No.6 　2005 11 CHINA MEASUREMENT TECHNOLOGY Nov, 2005 　　　　　 CompactPCI PCI IO 1, 2 1 2 王　涛 , 张德源, 郭建军 (1., 610054;2., 610036) 　:CompactPCI PCI , CPU , CompactPCI PCI 。CompactPCI PCI IO , PCI9054 , , 。 :CompactPCI PCI ;DMA;FIFO :TP334.4　　　　:A　　　　:1672-4984(2005)06-0110-03 A design of high speed digital IO based on CompactPCI bus WANG Tao, ZHANG D -yuan, GUO Jian-jiu (1.School of Automatic Engin ring, Univ rsity of El ctronic Sci nc and T chnology, Ch ngdu 610054, China; 2.National EW Lab, Th 29 Institut of CETC, Ch ngdu 610036, China) Abstract:CompactPCI PCI bus is a kind of bus archit ctur of high sp d and ind p nd nc of CPU.To utiliz CompactPCI PCI bus to d v lop digital communication manufactur s of high p rformanc , it is important to d sign th CompactPCI PCI Card s local bus int rfac logic int nsiv ly.In this pap r, through th d sign of high sp d figur IO bas d-on CompactPCI PCI bus, and laborat ly analyzing int rfac control logic of PCI9054 s local bus, figur s out th impl m nt d construction of th int rfac circuits with CPLD, as w ll th finish d d sign. Key words:CompactPCI PCI bus;DMA;FIFO 1　　 RAM ), CompactPCI PCI CPU , , 、、, , 。 , PC PCI 。 。PC (ISA 、EISA 、MCA ) BIOS PCI Cach , , , , CPU PCI , 。PCI , ; , , 。, , , PCI , 2K Input Ou