基于抗静电设计的集成电路可靠性技术研究!.pdfVIP

第2期 微 处 理 机 No.2 . . 微 处 理 机 2017年 2017年 月4 MICROPROCESSORS Apr. ，2017 基于抗静电设计的集成电路可靠性技术研究 杨菊瑾 （中国电子科技集团公司第四十七研究所，沈阳110032） 摘 要：集成电路工艺发展到深亚微米阶段,器件的物理尺寸日益减小,芯片的可靠性设计面临 的问题越来越复杂。为缩短研制周期，节约成本，应在电路设计时就考虑可靠性问题。ESD是CMOS 电路中最为常见的失效机理之一，严重的会造成电路自我烧毁。概述了集成电路的可靠性设计，介绍 了CMOS集成电路ESD保护的必要性，分析了ESD 的失效机理，研究了在CMOS 电路中几类常见的 ESD保护方法，分析了各种保护方式的原理和特点。 关键词：可靠性；静电放电；ESD保护电路；集成电路工艺；晶闸管；栅接地场效应管 DOI：10.3969/j.issn.1002-2279.2017.02.006 中图分类号：TN40 文献标识码：A 文章编号：1002-2279-（2017）02-0022-04 Researchof ReliabilityTechnology BasedonAntistatic Design YangJujin (The47thResearch Institute of ChinaElectronics TechnologyGroup Corporation,Shenyang110032,China) Abstract: As the integrated circuit developing to deep-sub micron, the characteristic dimension of IC device is decreasing day by day, and the reliability design, with a lot of complex technical problems, should be considered firstly for shortening the development cycle and saving the cost. Electrostatic discharge(ESD) is one of the most common reliability issues in the integrated circuit(IC) industry, which may cause the burnout of circuits. The reliability design of IC is introduced and the necessity of ESD protection for CMOS IC and ESD failure mechanism is presented. The ESD protection methods used in CMOS IC are discussed and their features are analyzed. The electrostatic discharge protection methods andfeatures used in deep-submicron CMOSICare discussed aswell. Key words: Reliability;Electrostatic discharge;ESD protection circuit;Integrated circuit techno- logy;SCR;GGNMOS