实战九、单通道模拟量采集器（Actual nine and single channel analog sampler）.doc

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实战九、单通道模拟量采集器（Actual nine and single channel analog sampler）.doc

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实战九、单通道模拟量采集器（Actual nine and single channel analog sampler）

实战九、单通道模拟量采集器（Actual nine and single channel analog sampler） The purpose of this fight is to make you familiar with the function of ADC module and the method of AD conversion Project implementation: from the chip RA0 input a can be changed at any time analog (by adjusting the DEMO board VR1) Then, the microcontroller will be able to simulate the number of analog / digital conversion in a timely manner and display it with LED. We can see the conversion result It changes with the amount of analog so that we can understand the work of the on-chip ADC module. The software design idea of this example: using the chip hardware resource TMR0 and prescaler to provide the timing start signal for ADC. however Instead of using the interrupt function, the software query method is adopted, and the result is left justified. Ignoring the minimum 2 bits will The 10 bit AD is used as the 8 bit, and the A/D conversion clock source uses 8 times the system cycle. This example does not require high voltage reference for the ADC We chose the power supply voltage VDD and VSS as the reference voltage, whether the A/D conversion process was completed or not, and did not use the interrupt function of the ADC module Instead, query the interrupt flag bits ADIF in software. The analog channel used in this example is AN0. The program file name MCD-AD1.ASM The procedure list is as follows: ************************************; LIST P=16F877; list pseudo instruction INCLUDE P16F877.INC; contains the inclusion file into the source ORG 0000H NOP; place an empty operation command for ICD segments START BANKSEL PORTC; select the same body as the PORTC register CLRF PORTC; clear PORTC MOVLW B010000001: Select: clock clock source is FOSC/8, allowing ADC to work MOVWF ADCON0; channel AN0; the conversion process is not started for the time being BANKSEL OPTION_REG; the body of the select register OPTION_REG is the current body MOVLW setting: RB port does not need pull-up; divider is allocated to