采用测频原理的数字频率计审稿版修改.docx

课程设计任务书学生姓名：高增礼专业班级：通信1104 指导教师：陈适工作单位：信息工程学院题目: 采用测频原理的数字频率计要求完成的主要任务:采用测频法，设计一个4位十进制数字显示的数字频率计其测量的范围为1~9999KHz课程设计进度安排序号阶段内容所需时间1方案设计1天2软件设计2天3系统调试1天4撰写报告1天合计5天指导教师签名：年月日系主任（或责任教师）签名：年月日目 录摘要........................IAbstractII前言11. FPGA、VHDL及QuartusII概述21.1 FPGA简介...........................................................................................................................21.2 VHDL 概述..........................................................................................................................21.3 QuartusII..........................................................................................................................32频率测量原理及方案42.1设计要求.............................................................................................................................42.2 频率测量方法....................................................................................................................42.3方案提出及确定.................................................................................................................52.4系统设计.............................................................................................................................62.5系统组成............................................................................................................................72.6小结..................................................................................................................................83数字频率计VHDL程序与仿真93.1顶层模块图.........................................................................................................................93.2程序设计.............................................................................................................................94 仿真测试144.1调试和器件编程...............................................................................................................144.2频率计仿真结果...............................................................................................................145 心得体会17