三维3D叠层封装技术及关键工艺.pdfVIP

2009年全国博士生学术会议 科技进步与社会发展跨学科学术研讨会论文集 三维（3D）叠层封装技术及关键工艺 郑建勇，张志胜，史金飞 （东南大学机械工程学院，江苏南京，211189) 摘要：三维（3D）叠层封装技术是一种可实现电子产品小尺寸、轻重量、低功耗、高性能和低成本的先进 封装技术，该技术已广泛用于手机、数码相机、MP4及其他的便携式无线产品。文中对3D叠层封装技术进行了 简要介绍，重点分析了三维叠层封装技术的分类和关键工艺，阐述了三维叠层封装技术的优点，并对3D叠层封 装技术所面临的一些问题和应用前景进行了分析。 关键词：3D叠层封装技术；封装工艺；芯片堆叠；封装堆叠 Integrated Circuit Three Dimension Stacked Package and Its Key Technology Zheng Jian-yong, Zhang Zhi-sheng, Shi Jin-fei (Department of Mechanical and Engineering, Southeast University, Nanjing ,Jiangsu,211189) Abstract: In recent years, the increasing demands for the high performance integrated circuit devices have led to the development of multi-die stacking technology in a single package. The 3D (three dimension) stacked package technology is developing trend of the integrated circuit advanced high-density packaging, which can easily meet the developing of smaller footprint, lower profile, multi-function, lower power consumption and lower cost for the cell phones and consumer products like digital cameras, MP4, PDA and other wireless devices. Some correlative concepts of the 3D stacked package have been proposed in this paper. Firstly, the development trends and the general classifications of 3D stacked package have been introduced. Furthermore, in order to compare with the traditional 2D package (MCM), the advantages of the 3D stacked package technology have been discussed, and it also briefly states the technical challenges that 3D stacked package technology must be faced. In addition, the potential applications that may take advantage of 3D stacked package technology are discussed. Keywords: Integrated circuit; 3D stacked package; Advantages; Application 1 引言 随着手机、P