减小共模电压的通用多电平SVPWM算法及FPGA实现-电机与控制学报.PDF

14 10 Vol14 No10 2010 10 ELECTR IC MACH INES AND CONTROL Oct. 2010 SVPWM FPGA 杨荣峰, 王高林, 于泳, 徐殿国 ( , 150001) : 针对电平数增加造成开关矢量数目增多, 导致多电平空间矢量脉宽调制算法实现复杂的 问 , 提出一种通用的多电平空间矢量脉宽调制快速计算方法该方法基于参考电压分解, 利用相 电压合成电压矢量, 能快速确定合成电压矢量及计算各矢量的作用时间, 具有清晰的物理概念讨 论了为减小输出共模电压的 7段/5段式空间矢量脉宽调制开关序列的生成方法及 F GA 实现的 简化方法所提出的调制算法具有通用性, 适用于任意电平且复杂程度与电平数无关, 输出共模电 压小, 始终限制在单位电平的 2/3以下, 相电压波形正弦对称, 谐波含量少算法计算量小, 无需查 找表, F GA 实现容易, 占用资源少 : 脉宽调制; 多电平; 电压分解; 共模电压; F GA : TM56 : A : 1007- 449X( 2010) 10- 0078- 06 Generalizedmultilevel voltage SVPWM algorithm for common mode voltage reduction and FPGA implementation YANG Rongfeng, WANG Gaolin, YU Yong, XU Dianguo ( School of Electrical Engineering andAutomation, H arbin Institute of Technology, H arbin 150001, Ch ina) Abstract: The vector number increasesw ith the more voltage levels, and which complicates the mi ple mentation ofmultilevel voltage space vector pulsew idthmodulation( SV WM) algorithm. This paper pro posed a phase voltage projection based fast generalmultilevel SV WM method. This paper illustrated the base sw itch vectors selection, dwelling tmi e calculation, the sw itch sequence determ ination for 7 sects/5 sects SV WM to reduce commonmode voltage ( CMV) and F GA realization. Thismethod suits general izedmultilevel converters and the complication has no relationship w ith the voltage level number. The output common mode voltage could be awl ays lmi ited under 2/3 voltage leve,l and the phase voltages waveforms are symmetrical sinusoidsw ith few harmonics. Thism ethod, does not need lookup table w ith