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基于FPGA和DSP的高速数据采集实时处理系统的设计-高速信号处理板.PDF

基于FPGA和DSP的高速数据采集实时处理系统的设计-高速信号处理板.PDF

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第30 卷 第3 期 电 子 器 件 V ol. 30 No. 3 2007 年6 月 Chinese Journal Of Elect ron Dev ices Jun. 2007 Design of High Speed Data Collecting and Processing System in Time Based on FPGA and DSP 1, 2 2 1 M a X iu-j uan , K A O li , ZH A O Guo-l iang 1. H arbin E ngineer ing Univ er sity , H ar bin 150001, Ch ina; 2. H arbin nstit ute of T echn olog y We ihai Sh angd ong 264209, China) Abstract:The design of high speed data collecting and processing system based on ADC FPGA DSP is introduced in order to capture and detect quickly the lidar. s echo and process in time. The lidar. s echo is converted to digital signal by the high-speed ADC and is buffered by FIFO using PingPang mechanism in time. T he digital signal is rea-l timely processed by the digital signal processor ( DSP) . T he design is simpl-i fied, reliable, real-time. It has the 200 MHz sampling rate, 8 bit vertical resolution and 2 M @ 32 bit off- chip memory with realizing several kinds of trigger mode such as instantaneous triggering Post-trigger or Pre-trigger and software trigger. T he system can accurately compute distance and velocity and real timely give an alarm in advance. It can exactly calculate the distance and speed of the object and raise the alarm in time. T he scheme of the system and the main modules are presented in detail. Key words:high speed data acquisition; rea-l time processing; FPGA; DSP ACC:7210G FPGADSP 1, 2 2 1 马秀娟 , 考 丽, 赵国良 1. , 150001; 2. , 264209 : , ADC FPGA DSP . ( ADC) , FIFO , DSP . , 200 M Hz, 8 bit , 4 M @

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