- 1、本文档共5页,可阅读全部内容。
- 2、有哪些信誉好的足球投注网站(book118)网站文档一经付费(服务费),不意味着购买了该文档的版权,仅供个人/单位学习、研究之用,不得用于商业用途,未经授权,严禁复制、发行、汇编、翻译或者网络传播等,侵权必究。
- 3、本站所有内容均由合作方或网友上传,本站不对文档的完整性、权威性及其观点立场正确性做任何保证或承诺!文档内容仅供研究参考,付费前请自行鉴别。如您付费,意味着您自己接受本站规则且自行承担风险,本站不退款、不进行额外附加服务;查看《如何避免下载的几个坑》。如果您已付费下载过本站文档,您可以点击 这里二次下载。
- 4、如文档侵犯商业秘密、侵犯著作权、侵犯人身权等,请点击“版权申诉”(推荐),也可以打举报电话:400-050-0827(电话支持时间:9:00-18:30)。
查看更多
第30 卷 第3 期 电 子 器 件 V ol. 30 No. 3
2007 年6 月 Chinese Journal Of Elect ron Dev ices Jun. 2007
Design of High Speed Data Collecting and Processing System
in Time Based on FPGA and DSP
1, 2 2 1
M a X iu-j uan , K A O li , ZH A O Guo-l iang
1. H arbin E ngineer ing Univ er sity , H ar bin 150001, Ch ina;
2. H arbin nstit ute of T echn olog y We ihai Sh angd ong 264209, China)
Abstract:The design of high speed data collecting and processing system based on ADC FPGA DSP is
introduced in order to capture and detect quickly the lidar. s echo and process in time. The lidar. s echo is
converted to digital signal by the high-speed ADC and is buffered by FIFO using PingPang mechanism in
time. T he digital signal is rea-l timely processed by the digital signal processor ( DSP) . T he design is simpl-i
fied, reliable, real-time. It has the 200 MHz sampling rate, 8 bit vertical resolution and 2 M @ 32 bit off-
chip memory with realizing several kinds of trigger mode such as instantaneous triggering Post-trigger or
Pre-trigger and software trigger. T he system can accurately compute distance and velocity and real timely
give an alarm in advance. It can exactly calculate the distance and speed of the object and raise the alarm in
time. T he scheme of the system and the main modules are presented in detail.
Key words:high speed data acquisition; rea-l time processing; FPGA; DSP
ACC:7210G
FPGADSP
1, 2 2 1
马秀娟 , 考 丽, 赵国良
1. , 150001;
2. , 264209
: , ADC FPGA DSP
. ( ADC) , FIFO , DSP .
, 200 M Hz, 8 bit , 4 M @
文档评论(0)