PowerPC 处理器系列介绍.ppt

PowerQUICCTM Communications Processors PowerPC Core Evolution – Platform Scalability Scalable Performance, Integration Connectivity PowerQUICC? Family Roadmap MPC885 Family Derivatives Matrix MPC8272 – Block Diagram and Features Features 603e core with 16K inst 16K data caches 64-bit 60x bus 32-bit 33/66 MHz PCI 2 FCCs supporting HDLC,10/100 Ethernet, ATM 3 SCCs, USB, 2 SMCs, SPI, I2C 2 TDMs supporting up to 64 HDLC channels for 2 x E1/T1 interfaces Memory controller built from SDRAM, UPM, GPCM machines Integrated Security - DES/3DES, MD5/SHA-1, AES, RNG, PKE, ARC4 Performance (CPU/CPM/Bus) 400/200/100 MHz 300/200/100 MHz 266/200/66 MHz (industrial temp available) 1.2W @ full performance , 1.5V Technology 130nm, 3.3V I/O, 1.5 V Core 516 PBGA, 27x27mm, 1.00mm pitch Availability General Samples: NOW Production: NOW MPC8248 – Block Diagram and Features Features 603e core with 16K inst 16K data caches 64-bit 60x bus 32-bit 33/66 MHz PCI 2 FCCs supporting HDLC,10/100 Ethernet 3 SCCs, USB, 2 SMCs, SPI, I2C 2 TDMs supporting up to 64 HDLC channels for 2 x E1/T1 interfaces Memory controller built from SDRAM, UPM, GPCM machines Integrated Security - DES/3DES, MD5/SHA-1, AES, RNG, PKE, ARC4 Performance (CPU/CPM/Bus) 400/200/100 MHz 300/200/100 MHz 266/200/66 MHz (industrial temp available) 1.2W @ full performance , 1.5V Technology 130nm, 3.3V I/O, 1.5 V Core 516 PBGA, 27x27mm, 1.00mm pitch Availability General Samples: NOW Production: NOW PowerQUICC II? Family130nm Derivatives Matrix QUICCstart Evaluation Boards Platform enables software and hardware engineers to evaluate PowerQUICC silicon in the early stages of product selection Eliminate cost of prototypes before target system is designed Download code to evaluate performance Live target for algorithm development Use before target hardware is complete or ADS is purchased All components in box – board, CodeWarrior Development Studio, power supply, cables, schematic, start up guide – up and running in 30 minu