一种非阻塞多VP共享缓冲区描述符提交机制.doc

一种非阻塞多VP共享缓冲区描述符提交机制 　　摘要：针对NIC芯片资源和面积受限的特点，设计了一种资源占用少的多VP共享缓冲区的描述符提交机制DAMQ-PD，设计了地址队列记录每个数据的存储地址，结合每个VP的头尾指针，将各VP分散存储于共享缓冲区的数据链接起来，实现了写、读数据的流水操作.设计了启发式信用管理机制HCM，按需动态给各VP分配信用，自动在PIO和DMA这两种描述符提交方式间切换，避免无信用可分配时可能造成对用户进程的阻塞.分析和模拟结果表明，DAMQ-PD资源占用少、缓冲区利用率高、读写流水、消息发射率高，满足了用户进程提交描述符对低延迟和大容量的性能要求. 关键词：描述符；DAMQ；信用管理；PIO；DMA；消息发射率；低延迟 中图分类号：TP338 文献标识码：A An Unblocking Descriptor Injection Method Based on Multi-VP Shared Buffer LIU Lu， ZHANG He-ying， ZHANG Lei， CAO Ji-jun， DAI Yi （College of Computer， National Univ of Defense Technology， Changsha， Hunan 410073， China） Abstract： This paper proposed a novel multi-VP shared buffer named DAMQ-PD with mixed PIO and DMA for descriptor injection on NIC chip to decrease the memory and area requirement of statically allocating buffer among multiple virtual ports （VP）. An address queue was used to record the address of every data in the shared buffer. Combining each VP’s head pointer and tail pointer， each VP’s data can be linked in the shared buffer according to input sequence. By doing so， pipelining reading and writing of the shared buffer can be implemented. A heuristic credit management method was also proposed to distribute credits according to the need of each VP， which can automatically switch descriptor injection method from PIO to DMA or vice versa， thus avoiding block execution of user process when no credit is available. Analyses and simulations show that DAMQ-PD achieves high buffer utilization， pipelining write and read， high message issue rate， thus satisfying the low latency and large capacity performance requirement of descriptor injection on NIC. Key words： descriptor； DAMQ； credit management； PIO； DMA； message issue rate； low latency 处理器时钟频率达到4 GHz后，再依赖减小尺寸提升主频来提高处理器性能的做法变得越来越困难，业界转而利用在单处理器芯片上集成多个核，通过提高并行执行度来提升处理器的性能.VLSI工艺的进步支持这种技术路线的演进.依靠核数的堆叠，处理器的性能一直在持续攀升，并将继续按摩尔定律发展. 随着单个处理器及单个计算结点的计算性能不断提高，集成了成千上万个计算结点的HPC（High Performance Computer）的峰值性能也不断提高，但是由于技术和成本等原因，HPC的访存性能、I/O性能和互连网络性能的提升速度却