CC2500程序.docx

#include PowerMan.h#include CC2500.huint8 CC2500_TxRxBuf[1+CC2500_DATA_LEN ];//地址+数据uint8 CC2500_TxAddr = 0x01;uint8 CC2500_RxAddr = 0x01;const uint8 PaTabel[8] = {0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60};//--------------------------CC2500 寄存器配置---------------------------------const CC2500_RF_SETTINGS CC2500_Config = {0x0B, // IOCFG2 GDO2 output pin configuration.0x06, //IOCFG10x06, // IOCFG0 GDO0 output pin configuration. 0x07, //FIFOTHR0xD3,//SYNC1 MSB0x91, //SYNC0 LSB1+CC2500_DATA_LEN, // PKTLEN Packet length.0x02, // PKTCTRL1 Packet automation control.0x04, // PKTCTRL0 Packet automation control.0x01, // ADDR Device address.0x00, // CHANNR Channel number.0x07, // FSCTRL1 Frequency synthesizer control.0x00, // FSCTRL0 Frequency synthesizer control.0x5D, // FREQ2 Frequency control word, high byte.0x93, // FREQ1 Frequency control word, middle byte.0xB1, // FREQ0 Frequency control word, low byte.0x2D, // MDMCFG4 Modem configuration.0x3B, // MDMCFG3 Modem configuration.0x73, // MDMCFG2 Modem configuration.0x22, // MDMCFG1 Modem configuration.0xF8, // MDMCFG0 Modem configuration.0x47, // DEVIATN Modem deviation setting (when FSK modulation is enabled).0x00, // MCSM2 Main Radio Control State Machine configuration.0x02, // MCSM1 Main Radio Control State Machine configuration.0x18, // MCSM0 Main Radio Control State Machine configuration.0x1D, // FOCCFG Frequency Offset Compensation Configuration.0x1C, // BSCFG Bit synchronization Configuration.0xC7, // AGCCTRL2 AGC control.0x00, // AGCCTRL1 AGC control.0xB2, // AGCCTRL0 AGC control.0x00, // WOREVT1 0x00, // WOREVT0 0x00, // WORCTRL 0xB6, // FREND1 Front end RX configuration.0x10, // FREND0 Front end RX configuration.0xEA, // FSCAL3 Frequency synthesizer calibration.0x0A, // FSCAL2 Frequency synthesizer calibration.0x00, // FSCAL1 Frequency synthes