POWER CONSUMPTION STABILIZATION SYSTEM AND METHOD专利US6933862B2.doc

[公开号]: US6933862B2 [专利名称]：POWER CONSUMPTION STABILIZATION SYSTEM AND METHOD [公开日]: Aug. 23,2005 [国际分类]: H03M 7/00; H03K 17/16 [申请号]: 10/684,992 [申请日]: Oct. 14, 2003 [发明人]：Robert M. R. Neff, Palo Alto, CA (US) [申请人]：Agilent Technologies, Inc., Palo Alto, CA (US) [优先权号]：US 2005/0078016 A1 Apr. 14, 2005 [同族专利]： [发明摘要]： A source signal is provided. The source signal is XORed with a scrambling random signal to generate a scrambled signal. The scrambled signal is transmitted through the digital logic circuit. The scrambled signal is XORed with the descrambling random signal logically identical to the scrambling random signal to produce a descrambled signal identical to the source signal. In one embodiment, the scrambling random signal is transmitted through the digital logic circuit and used as the descrambling random signal. In another embodiment, the scrambling random signal and descrambling random signal are generated independently using pseudo-random number generators. In yet another embodiment, the scrambling random signal is self-synchronizing and is contained within the pattern of the scrambled signal. [发明领域（关键词）]： The technical field of this disclosure is digital logic circuits, particularly digital logic circuits having a power consumption stabilization system and methods of stabilizing power consumption. [发明背景]： Power consumption in many digital logic circuits is a function of the number of signal level changes occurring in the circuit. There is low power consumption when signal levels are constant and high power consumption when the signal levels change often. For example, transmitting the sequencerequires twice the power ofand four times the power offor a circuit where the power consumption is dependent on the frequency of transition. In large digital chips, logic circuits may be classified as control or data flow circuits. Control circuits determine where data goes or what operation will occur. Data flow circuits handle the actua