AT24HC02B(汽车用串行存贮芯片资料ATMEL).pdfVIP

Features • Write Protect Pin for Hardware Data Protection – Utilizes Different Array Protection Compared to the AT24C02B • Low-voltage and Standard-voltage Operation – 1.8 (VCC = 1.8V to 5.5V) • Internally Organized 256 x 8 (2K) • Two-wire Serial Interface • Schmitt Trigger, Filtered Inputs for Noise Suppression • Bidirectional Data Transfer Protocol • 1 MHz (5V) and 400 kHz (1.8V, 2.5V, 2.7V) Clock Rate • 8-byte Page Two-wire Serial • Partial Page Writes Allowed • Self-timed Write Cycle (5 ms Max) EEPROM • High Reliability – Endurance: One Million Write Cycles – Data Retention: 100 Years 2K (256 x 8) • 8-lead PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP Packages • Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers AT24HC02B Description The AT24HC02B provides 2048 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 256 words of 8 bits each. The device is opti- mized for use in many industrial and commercial applications where low-power and low- voltage operation are essential. The AT24HC02B is available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP packages and is accessed via a two-wire serial interface. In addition, the entire family is available in 1.8V (1.8V to 5.5V) version. Table 1. Pin Configuration Pin Name Function 8-lead TSSOP A0–A2 Address Inputs SDA Serial Data A0 1 8 VCC SCL Serial Clock Input A1 2 7 WP WP Write Protect