唐斌-数字信号处理课件-chp6 第1讲qqqq.pptVIP

Ch.6Structures for Discrete-Time Systems Main contents Block diagram representation of difference equation Signal flow graph representation of difference equation Basic structures for IIR SY Basic structures for FIR SY 6.0 Introduction For a SY with rational system function Basic operations to realize a LTI system Block diagram, Signal flow graph 直观体现系统的实现结构和运算步骤，乘法、加法运算次数以及存储单元多少 Two equivalent representations addition, multiplication by a constant, delay 不同结构所需要的延时（存储）单元、乘法次数可能不同，前者影响系统复杂度，后者影响运算速度。 有限字长情况下，不同运算结构的精度、误差、稳定性也可能不同。 通过数学变换，同一系统可以有多种实现结构，它们在数学上是等价，但不同的运算结构将会影响系统的运算速度、复杂度、精度、误差、稳定性等许多重要性能。 6.1-6.2 Block diagram representation and Signal flow graph representation Block diagram symbols addition: multiplication: unit delay: Signal flow graph symbols Eg 6.1 node Source node node Sink node branch Block diagram Signal flow graph The value at each node in a graph is the sum of the outputs of all branches entering the node. Eg 6.3 Determine the system function from a flow graph ZT The value at each node in a graph is the sum of the outputs of all branches entering the node. Require only one multiplication and one delay (memory) element Require two multiplication and two delay (memory) element 6.3 Basic structures for IIR systems Direct Form Cascade Form Parallel Form 6.3.1 Direct Forms Direct Form I Let Then (realize zeros) (realize poles) Delayer: (M+N) Multiplier: (M+N+1) Direct Form II (Canonic Form) —— minimum number (realize zeros) (realize poles) Delayer: Multiplier: (M+N+1) 特点 直接I型结构由两个网络级联：第一个横向结构M节延时网络实现零点，第二个有反馈的N节延时网络实现极点；直接II型结构也由两个网络级联：第一个有反馈的N节延时网络实现极点，第二个横向结构M节延时网络实现零点； 实现N阶IIR系统(一般N≥M) ，直接I型结构需要(N+M)个延时单元；直接II型结构需要N个延时单元，所需延时单元最少，故称为规范型； 系数ak, bk与系统函数的零、极点关系不明显，因而不能很好地对系统频率响应性能进控制。 极点对系数的变化过于灵敏，从而使系统频率响应对系统变化过于灵敏，也就是对有限精度(有限字长)运算过于灵敏，容易出现不稳定或产生较大误差。 Eg. Draw direct form I and II for the given system Direct form I Direct form II real 将两个一阶因子组合成一个二阶因子(或将一阶因子看成二阶因子的特例) five multipliers four multipliers 系统函数分解成由若干个二阶因子级联