数电课件Lec12-Chap 6.ppt

Jin. UESTC Digital Logic Design and Application * Digital Logic Design and ApplicationLecture #12 Chapter 6 Combinational Logic Design Practices Encoders UESTC, Spring 2014 6.5 Encoders The process of using binary codes for a particular signal is called encoding. 用二进制代码代表特定的信号的过程就叫编码。 * 1. Encoder 特定的物理含义的信号 已经为某种数字信号 Multiple-Input, Multiple-Output Logic Circuit 6.5 Encoders Encoders discussed in this course 一般是将十进制码转换为相应的其它编码，其实质与代码转换译码器一样。 Binary encoder（二进制编码器） Output code has fewer bits than its input code. 2n-to-n encoder * 1. Encoder * 6.5 Encoders Binary Encoder A0 A1 A2 I0 I1 I7 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 0 0 1 0 1 1 0 0 0 0 0 0 0 0 1 1 1 1 I0 I1 I2 I3 I4 I5 I6 I7 A2 A1 A0 Truth Table for a 8-to-3 Encoder One –out-of-2n n bit binary 8-to-3 Encoder Guarantee: Only one input is asserted at any time. 任何时候只有一个输入有效 28种可能的输入组合中只有8种组合是有效的。 * 6.5 Encoders A0 = I1 + I3 + I5 + I7 A1 = I2 + I3 + I6 + I7 A2 = I4 + I5 + I6 + I7 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 0 0 1 0 1 1 0 0 0 0 0 0 0 0 1 1 1 1 I0 I1 I2 I3 I4 I5 I6 I7 A2 A1 A0 Truth Table for a 8-to-3 Encoder Guarantee: Only one input is asserted at any time. 任何时候只有一个输入有效 8种有效的输入组合中，任何时刻只有一位输入是有效的 * 6.5 Encoders The trouble: When more than one inputs are asserted? —— assign priority to the input Request encoder REQ0 REQ7 REQ1 Requests for service requestor’s number A0 = I1 + I3 + I5 + I7 A1 = I2 + I3 + I6 + I7 A2 = I4 + I5 + I6 + I7 Guarantee: Only one input is asserted at any time. * 1. Priority Encoder A2 A1 A0 IDLE I7 I6 I5 I4 I3 I2 I1 I0 Outpu