TD 招募岗位.docxVIP

Technology RD RequirementsModeling development EngineerPcell library Development EngineerPDK Post-layout Extraction EngineerDRC/LVS Development EngineerTechnology RD Process Integration EngineerTechnology RD Device Development EngineerTechnologyRD Module Process Engineer(TF, CMP, DIFF, LITHO, ETCH)Technology RD Reliability EngineerTechnology RD Yield EngineerModeling Development EngineerJob Description:Good understanding of the device physics of bulk CMOS transistors and the correlation of the process technologies to the active and passive device’s performance,Familiar and able to perform DC/AC/noise characterization and model extraction of bulk CMOS transistors using BSIM4.X, BSIM6, BSIM-CMG and PS model architectures in SPECTRE and HSPICE model formats,Familiar with interconnect modeling,Able to design and coordinate the test structure layouts and device matrices planning for SPICE modeling testchip development,Create and update model release notes, model reference documents and application notes. Document any known limitations, issues, and solutions, in order to communicate relevant information on proper usage of the CMOS transistor model kits to customers.Job Requisition:Master Degree is required(microelectronics, Physics)Software programming skills in UNIX, LINUX and Windows environment(C/C++, Perl , etc) would be an advantageHands-on experience with on-wafer DC/AC/noise characterizationFamiliar or has worked on foundry’s PDK and usage for deep submicrometer or nanometer testchiptapeouts,Good knowledge of bulk CMOS semiconductor processes on 28,40,65,130 and 180nm nodes,Good English and communication skills.Pcell library Development EngineerJob description:Cadence format Pcell library(including CDF, callback, pcell) development and quality control PDK packaging and releaseInternal user and external customer supportJob requisition:1.? Master or Bacholor degree is required(microelectronics, Electronics Engineering, physics, computer science)2.? Experienced in PD